Slide 1 ======= Prof. Thomas Sterling, Chief Scientist, Centre for Research in Extreme Scale Technologies (CREST) and Linux cluster computing pioneer ("father of Beowulf") John Gustafson, discovered Gustafon's law, developer of UNUMs James Reinders (Director, Chief Software Evangelist. Intel, USA). “Parallel Programming for C and C++ done right” Alex St. John, DirectX lead developer, GPU authority, Nyriad, Paul McKenney – IBM Distinguished Engineer, IBM Linux Technology Center, USA, Author: Is Parallel Programming Hard, And If So, What Can You Do About It?, developer Read-Copy Update features in Linux kernel Prof. Alexander Szalay – Alumni Centennial Professor of Astronomy at the Johns Hopkins University, Directory of Institute of Data Intensive Science Slide 2 ======= Professor, Tokyo Institute of Technology and Fellow, Advanced Institute for Science and Technology, Japan. Prof. Tony Hey – Chief Data Scientist, Science & Technology Facilities Council (STFC), UK Prof. Michelle Y. Simmons – Scientia Professor of Physics, University of New South Wales, Australia. Director, Centre for Quantum Computation & Communication Technology, Happy Sithole – Director, Centre for High Performance Computing, South Africa The Honourable Paul Goldsmith, New Zealand’s Minister for Science and Innovation, Minister of Tertiary Education, Skills and Employment, and Minister for Regulatory Reform Prof. Andreas Wicenec – Professor of Data Intensive Research, ICRAR, Perth, Australia. Task leader of the Data Layer for the SKA Science Data Processor John Gustafson – Visiting Scientist at A*STAR and Professor in the School of Computing at the National University of Singapore. He is a former Director at Intel Labs and the former Chief Product Architect at AMD. Pete Beckman, Co-Director, Northwestern-Argonne Institute for Science and Engineering, Argonne National Laboratory, USA. Dave Jaggar – former ARM’s Head of Architecture Design, New Zealand Victoria Maclennan – New Zealand ICT Professional of the Year; Co-Chair NZ Rise Why are still failing to attract and retain women in STEM? Paul Fenwick – Keynote – The Future Is Awesome (and what you can do about it) Slide 3 ======= On Feb 16 Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” when it comes online this summer (2017). Projections are that it will deliver 12.2 double-precision petaflops and 64.3 half-precision (peak specs). System is currently 40th on top 500, this is a tenfold increase in computativity. Eventual plans are to develop a 130 petaflop system machine The UNUMs project has had issues because of variable length representation which causes headaches for hardware designers. Software implementations of UNUMs are slow. However 'The End of Error' does contain an option for fixed length UNUMs; Sigmoid Unums: Posits "good enough" using "guess mode" (no ubit, but has a 'regime bit') and fixed position and Valids (rigorous), sets of real numbers (SORNS). Posits do not underflow or overflow. Designed to “drop into” existing hardware. Amusing privacy concern: designers were worried about privacy concerns for cameras; people were worried of surveillance if it counted blue-tooth devices – so cameras were accepted. Future development will be able to provide real-time updates on local conditions as well as enormous benefits for urban planners. Slide 4 ======= The ASKAP Science Data Processor software named ASKAPsoft has been in development since the ASKAP project started more than 10 years ago and is now processing and commissioning early science data with a third of the array. The software runs in a dedicated HPC platform located at the Pawsey Supercomputing Centre, processing radio interferometry data at a current rate sufficient to support the Early Science program. Software development and commissioning is ongoing to reach an order of magnitude better performance for the full ASKAP array. The talk described the development roadmap to support the full ASKAP and other instruments, in particular the SKA. DALiuGE is a prototype framework designed and developed on the basis of the requirements for the massive number of tasks and variable compute nodes required for processing the SKA data. It is using many of the ideas published for other existing frameworks, such as SPARK, Swift/T, TensorFlow or Parsec. IBM New Zealand has developed a software architecture known as the Information Intensive Framework (IIF), to address the SKA data deluge challenge. It is designed to automate routine aspects of scientists' workflow to create information and knowledge from scientific data, thus increasing data accessibility and productivity. The National e-Science Infrastructure (NeSI) HPC services will aid in this. In 2008, in conjunction with the French Space Agency (CNES), Venture Southland established the Awarua Tracking Station near Invercargill for the European Space Agency (ESA) to track Ariane 5 ATV launches. Work is underway to upgrade the station for tracking, telemetry and command, and reception of image data from remote-sensing satellites. Within the SDP processing the SKA could have opted for a closed solution for the rendering and delivery of data products, but the project has recognised an opportunity to do things differently by stipulating the guiding principles of using open standards, open source, and commodity computing. The talk walks through some of the opportunities and problems that will be faced by the SDP as the project attempts to realise the ambition of utilising commodity computing technology, with stringent high performance computing and energy requirements. Slide 5 ======= Satoshi now looking at device and architectural developments such as NVM, terabit optics and networks. Core issue however will not be performance increases but methodology choices. Relatively rare bugs in serial, low-processing speed past can be common bugs in a parallel high processing present, and extremely common in the future - with cascading problems the lower-level they are. The presentation gave an overview of the techniques being used to start to meet this challenge, up to and including some exciting advances in formal verification, which have resulted in formal verification being added to the Linux-kernel RCU regression-test suite. The International Technology Roadmap for Semiconductors has been the main guide for scientists developing on-going solutions to miniaturisation of devices. Between 1990 and 2010 the main thrust was the continuation of Moore's law applied to high performance computing. Recently concentrating on expanding role of high-speed communications. Now that the Internet of Things envisages vast networks of interaction sensor nodes is the newer and broader output. In the meantime, the limitations of CMOS and the as-yet unmanufacturability of research devices to continue miniaturisation is slowing and will stop progress. The low-cost high-volume manufacture of 0.2-0.3THz devices and circuits is still a challenge, but looking at recent progress in this latter space. Dave Jagger then researched research computer architecture at the University of Canterbury. From there he sent his thesis to MIPS, and Acorn and soon afterwards joined Acorn which would become ARM in the UK. He would go on to become the chief architect and author of the Advanced RISC Machines Reference manual. Slide 6 =======